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| (R) STP60NS04Z N - CHANNEL CLAMPED 10m - 60A - TO-220 FULLY PROTECTED MESH OVERLAYTM MOSFET PRELIMINARY DATA TYPE STP60NS04Z s s s s V DSS R DS(on) ID 60 A CLAMPED <0.015 TYPICAL RDS(on) = 0.010 100% AVALANCHE TESTED LOW CAPACITANCE AND GATE CHARGE 175 oC MAXIMUM JUNCTION TEMPERATURE 3 1 2 DESCRIPTION This fully clamped Mosfet is produced by using the latest advanced Company's Mesh Overlay process which is based on a novel strip layout. The inherent benefits of the new technology coupled with the extra clamping capabilities make this product particularly suitable for the harshest operation conditions such as those encountered in the automotive environment. Any other application requiring extra ruggedness is also recommended. APPLICATIONS ABS, SOLENOID DRIVERS s MOTOR CONTROL s DC-DC CONVERTERS s TO-220 INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol V DS V DG V GS ID ID I DG I GS I DM (*) P tot Drain- gate Voltage G ate-source Voltage Drain Current (continuous) at Tc = 25 oC Drain Current (continuous) at Tc = 100 C Drain Gate Current (continuous) G ate Source Current (continuous) Drain Current (pulsed) T otal Dissipation at Tc = 25 o C Derating Factor V ESD (G-S ) G ate-Source ESD (HBM - C= 100pF , R=1.5 k) V ESD (G-D) G ate-Drain ESD (HBM - C= 100pF, R=1.5 k) V ESD ( D-S) Drain-Source ESD (HBM - C= 100pF, R=1.5 k) Ts tg Tj Storage Temperature Max. Operating Junction Temperature o Parameter Drain-source Voltage (VGS = 0) Value CLAMPED CLAMPED CLAMPED 60 42 50 50 240 140 0.93 2 4 4 -65 to 175 -40 to 175 ( 1) ISD 60 A, di/dt 300 A/s, VDD V(BR)DSS, Tj TJMAX Un it V V V A A mA mA A W W /o C kV kV kV o o C C 1/8 (*) Pulse width limited by safe operating area November 1998 STP60NS04Z THERMAL DATA R thj -case R thj -case R thj -amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-case Typ Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose 1.07 0.85 62.5 0.5 300 o o C/W C/W o C/W o C/W o C AVALANCHE CHARACTERISTICS Symbo l IAR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max, < 1%) Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 30 V) Max Value 60 400 Unit A mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l VCLAMP I DSS IGSS V GSS Parameter Drain-Gate Breakdown Voltage Test Con ditions I D = 1 mA V GS = 0 -40 < Tj < 175 o C T j = 175 o C T j = 175 oC o T j = 175 C 18 Min. 34 50 50 150 Typ. Max. Unit V A A A V V DS = 16 V Zero Gate Voltage Drain Current (V GS = 0) Gate-body Leakage Current (VDS = 0) Gate-Source Breakdown Voltage V GS = 10 V V GS = 16 V I G = 100 A ON () Symbo l V GS(th) R DS(on) I D(o n) Parameter Test Con ditions Min. 1.7 Typ. 3 11 10 60 Max. 4.2 15 14 Unit V m m A Gate Threshold Voltage V DS =V GS ID = 1 mA -40 < Tj < 150 o C Static Drain-source On Resistance On State Drain Current V GS = 10V V GS = 16V ID = 30 A ID = 30 A V DS > ID(o n) x R DS(on )ma x V GS = 10 V DYNAMIC Symbo l g f s () C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz I D =30 A V GS = 0 Min. 20 Typ. 30 2500 800 150 3400 1100 200 Max. Unit S pF pF pF 2/8 STP60NS04Z ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Qg Q gs Q gd Parameter Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 16 V I D = 60 A V GS = 10 V Min. Typ. 70 20 22 Max. 100 Unit nC nC nC SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions V CLAMP = 30 V I D = 60 A R G =4.7 V GS = 10 V (see test circuit, figure 5) Min. Typ. 25 110 150 Max. 35 150 200 Unit ns ns ns SOURCE DRAIN DIODE Symbo l ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 60 A V GS = 0 65 0.15 4.5 I SD = 60 A di/dt = 100 A/s Tj = 150 oC V r = 25 V (see test circuit, figure 5) Test Con ditions Min. Typ. Max. 60 240 1.5 Unit A A V ns C A () Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STP60NS04Z Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STP60NS04Z Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Zero Gate Voltage Drain Current vs Temperature Source-drain Diode Forward Characteristics 5/8 STP60NS04Z Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STP60NS04Z TO-220 MECHANICAL DATA DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147 E mm TYP. MAX. 4.60 1.32 2.72 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 MIN. 0.173 0.048 0.094 4.40 1.23 2.40 inch TYP. MAX. 0.181 0.051 0.107 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 0.645 0.551 0.116 0.620 0.260 0.154 0.151 A C D1 L2 F1 D G1 Dia. F2 F L5 L7 L6 L9 L4 G H2 P011C 7/8 STP60NS04Z Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 1998 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com . 8/8 |
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